1. Field of the Invention
This invention relates to a process for operating a charge shift store, in which, for the regeneration of the items of data contained in storage loops, these items of data are advanced over regeneration stages in dependence upon a regeneration timing signal, and in which the input and output items of data are input via an input stage and output via an output stage in dependence upon an operating timing signal.
2. Description of the Prior Art
Charge shift arrangements (CCD charge coupled devices) are well known in the art. For an insight to these devices, one may refer to the periodical "Electronics", June 21, 1971, Pages 50-58, and to the periodical Bell System Technical Journal, Vol. 940, No. 4, 1970, Pages 587-593. Charge shift arrangements basically consist of a semiconductor substrate, an electrically insulating layer arranged on the substrate, and metal electrodes arranged on the insulating layer. The metal electrodes are isolated from one another. The pinciple of charge shift arrangements is based upon the connection of suitably selected voltages to these metal electrodes in order to provide, at the boundary between the insulating layer and the semiconductor substrate, favorable potential conditions in which minority charge carriers can be stored. A special write-in device feeds minority charge carriers into these potential wells at a suitable time, or blocks the minority charge carrier supply, as dictated by the data to be written in. Therefore, charge shift arrangements of this kind can be used with particular advantage for shift registers.
It is also known in the art to employ charge shift arrangements as stores. For this purpose, an input stage is provided at an input end of the charge shift arrangement which is, in this case, constructed as a shift register, an output stage is connected at the output end of this shift register, and a regeneration stage is provided between the output end and the input end of the shift register. A construction of this type is known as a storage loop. As the individual storage elements of such a storage loop can store the data only for a specific length of time, the store data is constantly recycled. Consequently, the store data is also conducted over the regeneration stage and is regenerated with each cycle. This type of operation of a charge shift store produces a high power loss. Therefore, it has been proposed that the power loss be reduced in that, apart from the high frequency operating timing signal, for non-addressed storage loops a lower frequency regeneration pulse train is used which allows the data of non-addressed storage loops to be constantly recycled, and therefore provides a continuous regeneration of data. However, the power loss is relatively high in this mode of operation.
For further information which generally concerns the process and apparatus of the present invention, one may take reference to the 1973 IEEE International Solid-State Circuits Conference, the Digest of Technical Papers, February 1973, Pages 136, 137 and 210, and The Bell System Technical Journal, Vol. 52, No. 2, February 1973, Pages 147-168.